Senior Digital Design and Verification Engineer

Publiceringsdatum: 2025-06-17

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För detta jobb är Lund den angivna tjänsteorten. Om du letar efter en spännande karriär inom civilingenjör, kvalitet, elektronik-branschen, har Xenergic AB just nu ett ledigt jobb som kan vara av intresse. Bli en del av Xenergic AB genom att ansöka till jobbet som civilingenjör, kvalitet, elektronik senast onsdag den sjuttonde september 2025.

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About Xenergic

Xenergic is a high-tech semiconductor company providing cutting edge high-speed, low-power embedded memory IP solutions in advanced technology nodes. These memories are targeted for market segment ranging from IoT and mobile applications to high-end servers and AI accelerators.

We are looking for a very passionate Senior Digital Design and Verification Engineer to join our team.

Job Description

As a Senior Digital Design and Verification Engineer, you will be responsible for the planning, design, integration, and verification of memory and digital blocks into test chips for tape-out. This role demands a strong background in RTL design, verification, and digital implementation—including scripting for automation, SystemVerilog, synthesis, and DFT—while optimizing for power, performance, and area (PPA).

You are expected to take initiative to ensure the test chip is both functionally correct and measurable, by addressing all relevant design and verification aspects such as power integrity, timing closure, and design-for-test (DFT). You will also contribute to the development of test patterns, testbenches, and BIST (Built-In Self-Test) to facilitate post-silicon validation.

Key Responsibilities

• Design and develop efficient digital blocks from specification to tape-out.
• Perform RTL coding, synthesis, and PPA optimization.
• Conduct functional verification including testbench creation, test case development, and debugging.
• Collaborate with analog, software, and system teams to define and integrate system requirements.
• Develop and implement robust verification strategies using SystemVerilog/UVM or similar methodologies.
• Participate in design reviews and provide insights into architecture, verification, and design improvements.
• Support the digital backend flow: floorplanning, physical synthesis, timing closure, and DFT integration.
• Deliver test patterns and support post-silicon validation and measurement efforts.

Required Qualifications

• Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• Minimum 5 years of experience in digital ASIC design and verification
• Strong expertise in RTL design using Verilog or VHDL.
• Proficiency in EDA tools such as Xcelium, ModelSim, VCS, and Genus.
• Solid understanding of verification methodologies including SystemVerilog and UVM.
• Experience with scripting languages (TCL, Python, or Perl) for design automation.
• Familiarity with backend tools such as Cadence Innovus for place & route and optimization.
• Knowledge of timing analysis, low-power design techniques, and DFT architecture.
• Hands-on experience with physical implementation: floorplanning, PnR, STA, timing closure, and sign-off.
• Excellent communication skills and ability to work effectively in a collaborative, cross-functional environment.
• Good understanding of silicon bring-up and post-silicon validation workflows.

If you have any questions, or would like to send in your application (CV and cover letter), contact us by e-mail to career@xenergic.com.

We look forward to receiving your application.